ASIC / FPGA engineer

Are you curious about starting a new exciting role, at a world-leading company in the space industry? Then this is your opportunity! Cobham Gaisler is looking for skilled ASIC / FPGA engineers to join our experienced development team. We welcome your application!
About the position
We have a market leading position in processor solutions for space, including satellite communications. We help our customers to increase the safety and mission capabilities of their personnel and equipment.
We can offer you a position where you get to further develop your skills in a global environment. From the office in the Gothenburg city center, you will be working in a international environment with development of digital hardware that can handle harsh conditions. As an ASIC / FPGA engineer you will participate in the complete development process of system-on-chip designs based on our IP cores, from architectural design, through development and verification, to implementation and prototype validation.
Job description
Development of RTL models of IP cores and system-on-chip using VHDL
Verification and FPGA prototyping of designs
Implementation in target technologies, including both ASIC and FPGA
Technical support to customers and sales organization

Qualifications
The ideal candidate is someone who thrives on solving complex problems, is a great communicator and is able to work independently as well as in a team, to build solutions together. You have prior experience of ASIC or FPGA development, including RTL design in VHDL as well as verification and implementation.
M.Sc. or Ph.D. in Computer Science or Electrical Engineering
Previous experience with ASIC / FPGA development in VHDL or Verilog
Fluent in English

To be successful with us, we see that you have prior experience in some of the following areas:
FPGA tools from Intel, Microsemi, Xilinx, Lattice and/or NanoXplore
ASIC design using Synopsys and Cadence synthesis tools, DFT and PG
Computer architecture, microprocessor design, RISC-V, SPARC
ASIC / FPGA verification in VHDL and/or SystemVerilog