OBS! Ansökningsperioden för denna annonsen har
passerat.
Arbetsbeskrivning
We are looking for a ASIC Verification Engineer.
Experience in following fields:
Gate level Simulation(GLS),
Low Power Verification,
Analog Mix Signal co-simulation (AMS Verification),
Jasper Connectivity Check (Formal Verification),
UVC development from scratch and SV assertion development.
Verification Spec development to Verification sign off with code and functional coverage closure.
Protocol Knowledge: AXI, CPRI, PCIE