ASICs verification engineer

ASICs verification engineer

Arbetsbeskrivning

We are looking for skilled engineers who can work as a consultant in our company.
We have a long-term assignment as a contractor with our clients. Our clients are Volvo, Ericsson, ARM, Axis. The work environment is positive and you will work with skilled colleagues.


Required skills:
FPGA
Scripting
ASIC
Top-level verification
Perl
SV-UVM Methodology
Linux
SoC
VHDL/Verilog



Scope:
The job is as an experienced IP verification engineering in a team developing subsystem and its IPs for the client´s ASICs. Most of the verification uses constrained random methodology but also dedicated test vectors and assertions are used.
The work includes:
• Development of UVM test benches and test cases for IPs.
• Debugging of the test environment and design
• Creation of Scoreboards
• Refinement of assertions and coverage
• Creation of relevant documentation
Required qualifications
• Advanced user of System Verilog
• Advanced user of UVM tools and methodology for IP verification.
• Significant experience in assertions, scoreboards, and coverage refinement




Please fill in your competence level (none, novice, medium, senior, expert) for the following:
System Verilog:
UVM:
IP verification know-how:
Top-level verification know-how:
Perl:
Python:
UNIX:
Clearcase:
VHDL:
FPGA know-how:
ASIC know-how:

Looking forward to your application!

Sammanfattning

  • Arbetsplats: KAVCOM AB
  • 1 plats
  • Tillsvidare
  • Heltid
  • Fast månads- vecko- eller timlön
  • Publicerat: 27 april 2021
  • Ansök senast: 27 maj 2021

Postadress

Björn Järnsidas Gränd 17
Lund, 22477

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