Design Engineer- STA/ Synthesis (ASIC)

Swedium Global is the growing System Engineering and Solution Company, offers services like Engineering R&D and Services to clients across the globe for onsite and offshore business model. We provide industry solutions to our customer through our dedicated development center in Bangalore (India) and Stockholm (Sweden).


www.swediumglobal.com


www.swediumglobal.com Swedium Global is looking for experienced ASIC Design Engineer (STA) for its project in Sweden. Work location will be in Sweden itself.
Required Skills and Experience


Experience in ASIC, SoC or FPGA logic design
At least 6 years of related experience
Expert in VHDL/Verilog/System Verilog
Excellent knowledge of DC/PC/ICC1/ICC2
Synthesis experience for Timing/Area/Power closure
multi-Core CPU Architecture Knowledge
Experience in using TCL/Python/Perl/etc....
Have worked with Environment like Linux, ClearCase, LSF
Experience with low Power


Please send your CV at pratik.pandey@swediumglobal.com