FPGA Design Engineer

We are currently looking for a detail-oriented FPGA designer with 5+ years of experience in the wired communication industry.


Requirements:
▪Master of Science in computer science or similar university degree
▪Extensive experience in RTL design, synthesis, and timing closurefor very high utilized and high-speed systemswith interfacesto 10G+ pluggable optics, DDR2/3modules, 10GE PHYs, local bus, and backplane links.
▪In-depth knowledge of CLBs, memories,androuting resources of Xilinx Ultrascale and 7 series FPGAs and used itto the full extent fordesigning wide data-paths clocking at high frequenciesofup to 400MHz.
▪In-depth workingknowledge ofITU-T SDH/OTNand IEEE 802.3 Ethernetst and digital layer aspects such as architecture, signal formats, protection switching, alarm and performance monitoringfor the former and very good working experience with MAC layersignal and packets for the ethernet.


USEFUL AREAS OF EXPERTISE
▪Verilog
▪Xilinx Vivado
▪Static Timing Analysis
▪Timing Closure
▪Testbench Development
▪Simulation with ModelSim
▪System Modeling in Matlab