ML Physical Implementation Engineer

The Role
Are you passionate about physical implementation of Machine Learning processors? Working on the cutting edge of Arm IP, you build technology that powers the next generation of mobile apps, portable devices, home automation, smart cities, self-driving cars, and much more!
At Arm, physical implementation is a crucial and integral part of the hardware development. In this role you will influence the RTL design and deploy the latest implementation techniques. You will have the opportunity to drive EDA vendors on leading-edge processes whilst pushing the boundaries of power efficiency and influencing physical library development.
Key Accountabilities/Responsibilities
As a physical implementation engineer you'll be part of a growing and highly skilled team focusing on our ML and Neural Network IP. You will be working on implementation activities throughout all stages of the project. You will both help to specify the implementation tasks for the project as well as to perform the actual implementation work including synthesis, place & route and signoff using standard cell methodology. The expectation is that you, as a senior member of the team will take the lead on larger work-packages and will be able to drive methodology threads in Arm wide forums.
Job Requirements
Education & Qualifications
Good university degree, in electronic engineering or computer science ideally, although other science graduates will be considered if they have proven experience.
Essential Skills & Experience
A deep understanding of the entire ASIC design flow and basic knowledge of at least one hardware description languages: Verilog, System Verilog or VHDL.
Proven experience in methodology for synthesis, floorplan, placement, clock tree synthesis, and route, using tools such as Cadence Genus/Innovus and Synopsys DC/ICC.
Experience with low power design techniques.
Proficient in scripting languages such as Tcl and Python.
Experience in planning the implementation process and making realistic effort and timescale estimates.
Knowledge of semiconductor fundamentals.

Desirable Skills & Experience
Knowledge of ML/ AI fundamentals.
Knowledge of the Arm architecture and AMBA bus system.
Experience with signoff flows including LEC and STA as well as power analysis tools.
Use of Linux and shell programming.

#LI-AH1