Senior Expert Mechanical reliability of chips and SIP

We are looking for Senior Expert Mechanical reliability of chips and SIP.
Be responsible for the delivery of future chip & SIP - level mechanical reliability solutions for Huawei's ICT products, such as wireless, network, and computing products, technological innovation and competitiveness.
This will include:
To take charge of reliability design and competitiveness of the chip package board interaction (CPBI) for large -size chips and SIP in products (wireless, transmission and access, intelligent computing, and energy domains). Have a good skills of the reliability tests, simulation design (mechanics, modulus, and thermal resistance), and failure analysis methods of industry-leading large-size chips, SIP and their board-level applications.
To be responsible for the layout and technical planning of mechanical reliability capability at the board and package levels for large-size chips and SIP, to build industry-leading mechanical simulation, experimentation, and failure analysis platforms, keep leading in mechanical reliability design capabilities for large-size chips and SIP from package to system application, and deliver competitive CPBI solutions.
To organize and lead the resolution of major mechanical reliability problems and key technical difficulties of the company to support the high reliability competitiveness of network products.



Requirements:
The candidate should have more than 10 years of experience in reliability design and simulation analysis in well-known enterprises or research institutes in the industry. Be familiar with the mechanical reliability design and research methods of large-size chips and SIP in boards.


Education:
PhD degree, with profound knowledge in mechanics, material mechanics, and electronic packaging reliability.


We expect the candidate to have:
Rich experience in mechanical reliability design of large-size chips or SIP, master key mechanical reliability challenges and risks of products, and be familiar with design improvement methods.
Solid knowledge about global research institutes and universities in the mechanical reliability field of largesize chips or SIP. Have good knowledge of the development direction of simulation and test technologies and advanced design improvement methods in the mechanical reliability field.
Have experience in technology platform and strategic planning in the mechanical reliability simulation and measurement field of large-size chips and SIP. Have capabilities to carry out precise quantitative design for mechanical reliability.
Good knowledge in the EDA tools
Availability to travel frequently

This is a full-time consultancy position at the Huawei R&D office in Stockholm.