SIC and FPGA Top Level Expert

Mandatory:
• Excellent skills in SystemVerilog/UVM and IP verification
• Good programming skills (neat, commented, maintainable code, no warnings). Quality conscious!
• Excellent debugging skills with complex designs
• Experience with IP level and system level verification
• Proficient in verification planning, reporting and driving verification closure. Must understand how a verification project works, from start to finish
• Must be able to work both in a team and independently
• Good communication skills, both written and oral English
• Good skills in working with UNIX and/or Linux
• At least 7 years in ASIC/FPGA industry ·

Meritorious:

• Experience with Matlab, and signal processing
• Experience with analog-mixed-signal type ASICs
• Experience using formal properties and tools, such as Jasper, InFact and similar
• Experience in using golden models/reference models in a test bench
• Experience in agile ways of working, in particular agile scrum
• Clearcase version control system experience
• VHDL knowledge
• Scripting in Perl, Python, Bash or C-shell
• More than 10 years in the ASIC/FPGA industry