Verification Engineer - ASIC - FPGA

Our company
Capgemini Engineering is part of Capgemini and has more than 270 000 employees located all over the world. Our core values Ambition & Care affect everything we do and we will always put our employees first. As a global company, we provide our clients with sustainable engineering solutions that tackle the environmental challenges of today.
Our goal is to help you thrive in your role and expand your knowledge and expertise. At Capgemini Engineering, we focus on getting tight groups where team members can help each other even if their assignment are at different companies. We meet several times a month for lunch or other activities to maintain and share knowledge.
Working for Capgemini Engineering is more than just a job. We have several activities during the year where we meet to share knowledge or just to have fun.
Your role
• Verification planning
• Verification specification
• Build/update/maintain the Verification environment
• Use and develop uVC´s
• Work with Constrained random testing and directed testing
• Work with Coverage collection
Your profile
Competence in areas such as modeling, design, verification, systemization and software design.
Experience in ASIC or FPGA verification and simulation on IP, sub-system and/or chip level using System Verilog UVM
Defined and implemented UVM test environments including coverage closure
You are a team player and the assignments require you to work in agile teams according to Kanban or Scrum.
Experienced in VHDL
Do not hesitate, send in your application as soon as possible, recruitment has already begun.
Application and contact
Selection and interviews are running continuously. Apply now since we assign roles during the whole application time span. For questions and for more information contact Jan Hansson, Talent Acquisition Partner, 0725-616900
We kindly but firmly refrain from direct contact with staffing, brokerage and recruitment companies as well as other external actors and sellers of additional job advertisements.