Verification Engineer - UVM / ASIC

Arbetsbeskrivning

Verification Engineer - UVM / ASIC
Assignment description
Our renowned client in the electronics industry is looking for Verification Engineer - UVM / ASIC for the Stockholm location with 5+ years experience.
The purpose of the role is to develop modules in the company's next generation of ASIC's for Radio equipment and Radio Access Network compute.
These modules perform advanced signal processing.
This role includes test bench systemisation, UVM test case development, verification and product documentation.

Required skills:
UVM Verification
ASIC Verification
System Verilog
Scripting
Verification
Radio HW
Radio Access Network compute
Product Documentation
Test bench systemisation

Sammanfattning

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